PCB Via Current Capacity: Formula, Worked Examples and Via Count

A standard plated via with a 0.3 mm drill and 20 µm of hole-wall copper has a copper cross-section of about 0.018 mm² (27 mil²), about the same as a 0.5 mm wide trace in 1 oz copper. Treated as an internal conductor with the IPC-2221 formula, that is roughly 0.7 A for a 10 °C rise and 1.0 A for 20 °C, which is why a 10 A path needs a group of vias, not one. Those figures are conservative estimates, not ratings: a short via connected to planes runs cooler than the formula assumes, and IPC-2152 covers vias but publishes no single amp value for them. This guide shows how to calculate via current, how many vias to use, and what to put in your fabrication notes.

Example calculation with the IPC-2221 internal-conductor formula; see the method below.

How Does a Via Carry Current?

Through the copper plated on the hole wall. The drilled hole goes through the laminate, and plating builds a copper tube inside it; that tube is the only conductor unless the via is filled with copper. Its cross-section is:

A = π × t × (d − t)

where d is the drilled diameter and t the plated wall thickness. For d = 0.30 mm and t = 0.020 mm, A = 0.0176 mm², or 27.3 mil² (1 mil² = 0.000645 mm²).

Two things make a via different from a trace of the same cross-section. It is short (one board thickness), so heat flows out of it into the traces and planes it connects. And it is buried in laminate, so it cannot shed heat to air the way an outer trace can. The first effect usually wins, which is why treating a via as an internal trace gives a cautious answer. Base copper weight does not set the wall thickness; plating does. See our copper weight guide for the foil side.

How Do You Calculate Via Current Capacity?

Use the IPC-2221 conductor formula with the barrel cross-section:

I = k × ΔT^0.44 × A^0.725

with I in amps, ΔT the allowed temperature rise in °C, A in mil², and k = 0.024 for internal conductors (0.048 for external). The formula comes from the older IPC-2221 charts and is stated as valid up to 17.5 A internal, 100 °C rise (KiCad calculator documentation).

Worked example, 0.3 mm drill, 20 µm wall, 10 °C rise: I = 0.024 × 10^0.44 × 27.3^0.725 ≈ 0.024 × 2.75 × 11.0 ≈ 0.73 A.

Which standard applies? IPC-2152 replaced the IPC-2221 charts as IPC’s method for current capacity. It relates current, conductor size and temperature rise for finished boards and has appendix sections on vias, on the path from conductor to via to plane, and on microvias (IPC-2152 contents). Its curves and via data are in the purchased standard, which IPC lists as the 2009 original, no longer maintained (IPC revision table). If a design is close to the limit, use IPC-2152 or a thermal simulation rather than the formula.

How Much Does Thicker Plating Help?

Less than people expect. Going from a 20 µm to a 25 µm wall on a 0.3 mm via raises the cross-section by about 23% (27.3 to 33.5 mil²), but because current scales with area to the power 0.725, the estimate rises by only about 15%, from 0.73 A to 0.84 A at 10 °C.

IPC-2221 internal formula, 10 °C rise.

Thicker plating is still worth specifying on high-current boards, mainly because the thinnest point in a barrel sets the hot spot and because thicker walls survive thermal cycling better. IPC-6012 sets the hole-wall copper minimums for each performance class, with Class 3 requiring more than Class 2; if you need a specific minimum, write the number on the drawing and ask for a microsection report. Our fabrication tolerances guide covers which specifications are worth paying for.

How Many Vias Do You Need for 5 A, 10 A or 20 A?

Divide the current by the per-via estimate, then add margin, because parallel vias do not share current equally; the ones nearest the source carry more. With the 10 °C estimates above:

These counts are a starting point for a conservative design, not a minimum from a standard. In practice:

• Place the vias across the full width of the incoming copper, not in one corner, so current spreads.
• Prefer fewer larger vias over many tiny ones when space allows; they also plate more evenly.
• Above roughly 20 A, look at thicker plane copper and wider pours as well; our heavy copper design guide covers the trade-offs.

Is the Via the Weakest Point in the Path?

Often, yes. A 2 mm wide outer trace in 1 oz copper can carry several amps, and a single 0.3 mm via under it is rated, by the same method, at under 1 A. Size the transition to match the trace on each side, using the same temperature-rise target for both. The trace side of the calculation is in our trace width and current guide.

The failure is rarely instant. An undersized via runs hot under load, and repeated heating and cooling can crack the barrel over time, which shows up as intermittent faults rather than an obvious burn.

How Do Thermal Reliefs Affect Via Current?

They reduce it. A thermal relief replaces a full ring of copper with a few narrow spokes, and the spokes, not the barrel, become the limit. Reliefs exist to stop planes from soaking up heat during soldering; a via used only to change layers has nothing soldered in it, so connect power vias to planes solidly. Keep reliefs on plated holes that take component leads. Our copper pour vs ground plane guide covers plane connections.

Do Tented, Plugged or Filled Vias Carry More Current?

Only copper-filled ones. Tenting covers the via with solder mask, and resin plugging or filling puts non-conductive material in the hole; neither adds conductor. A via filled and capped with copper (IPC-4761 Type VII, often called VIPPO) is used mainly so a via can sit inside a pad, for example under a power MOSFET, and the extra copper and cap help move heat into the board. If the only goal is more current, more plated vias are usually cheaper than special fills. See our comparison of via tenting, plugging and filling.

What Should You Check Before Sending Gerbers?

How Can We Help?

QueenEMS builds high-current boards including heavy copper PCBs, and we can plug or fill and cap vias (IPC-4761 Type VII) where a via has to sit in a pad. Put your plating requirement and the current-carrying nets in the fabrication notes, and the quote, returned within 2 hours for bare boards, states how those holes will be plated and treated. Need boards built to these via sizes? See our PCB fabrication capabilities.

Conclusion

A via’s current capacity comes from its plated wall: about 27 mil² for a 0.3 mm drill with 20 µm of copper, or roughly 0.7 A at a 10 °C rise by the conservative IPC-2221 method. Thicker plating helps less than its area suggests, so high-current paths need groups of vias spread across the copper, solid plane connections and, near the limit, IPC-2152 data or simulation. Contact us with your Gerber files, current requirements and plating notes for a quote.

FAQ

How much current can a via carry? A 0.3 mm via with a 20 µm wall carries roughly 0.7 A at a 10 °C rise by the IPC-2221 internal formula; larger drills and thicker plating carry more.

How thick is via plating? It depends on the specified class and the fabricator’s process; IPC-6012 sets the minimum for each class, and microsections show the actual value.

Does via plating thickness follow the copper weight? No. Foil weight and hole-wall plating are separate; specify the hole-wall minimum separately.

Does filling a via with epoxy increase current capacity? No. Non-conductive fill adds no conductor; only copper fill does.

How many vias do I need for 10 A? About 14 vias of 0.3 mm or 10 of 0.5 mm with 20 µm plating at a 10 °C rise by the conservative formula, spread across the copper.