8-layer bare PCB fabrication, Shenzhen
QueenEMS fabricates 8-layer bare boards in Shenzhen. Our CAM engineers prepare manufacturing data and review your controlled-net requirements and hole types before fabrication.
A fab note that gives impedance targets without layers or reference planes leaves open questions. The quoted construction then has to wait for answers, and the drill files may suggest a lamination route you did not intend.
Ready to quote? Use the form. To compare signal and plane allocations, see the plans below.
Only email is required.
Bare PCB quotes are typically sent within 2 hours of receiving complete Gerber files.
Standard 6–8 layer lead time under 1 m²; expedited builds from 36 hours.
Standard impedance tolerance; TDR test report supplied with controlled-impedance orders.
Electrical test (flying probe or fixture) and AOI on every board.
Before you send files
An impedance target needs trace geometry suited to its signal layer, nearby reference copper and dielectric. CAM asks for missing layer and geometry information, or proposes a construction for your approval before production.
Illustrative fab note: USB pair, differential target per net table, routed on L3, referenced to L2 and L4, CAD width and gap per net class.
Check: For each net class, list the target, layer, reference planes, and CAD trace width and gap.
The artwork shows where vias move a net between layers. It does not show which of those nets carry an impedance target on each layer they use. A net that moves from L3 to L6 changes reference planes, so the trace geometry on L6 needs its own calculation.
Illustrative fab note: data byte lanes route on L3 and L6; the same target applies on both layers.
Check: List every layer each controlled net uses, not only the layer where it starts.
Eight layers alone do not require high-density interconnect (HDI) or blind vias. Through holes run through the whole board; blind and buried holes connect selected layers. Those spans and their fabrication sequence determine the process to review.
Illustrative fab note: through holes only. Alternative: blind L1 to L2 and buried L3 to L6, each in its own drill file.
Check: Supply one drill file per span with its start and end layers, or state through holes only.
Our process
We review your controlled-net requirements and drill files against the construction. Plane splits, stitching vias and electrical performance remain with your design team.
We match each net class to its target, layer and reference planes, and note any entry that is incomplete.
We review impedance geometry on the signal layers you list, against their specified reference layers and proposed dielectric spacing. Any suggested artwork change comes back for approval.
We group holes as through, blind or buried from your drill files and confirm the lamination route those spans require.
We review your specified build or propose one where details are open. A core is cured laminate; prepreg is the resin and glass bonding sheet. We consider dielectric spacing, copper and material properties when reviewing impedance geometry.
We return the construction and any open questions; production starts after your approval.
Match your board
For eight-layer prototypes and production orders, include the details that apply to your design.
If you are still choosing between six and eight layers, read the 6-layer vs 8-layer comparison.
Layer roles
Both plans use eight copper layers. A reference plane is the solid copper layer next to a signal that carries its return current. Dielectric thickness and copper weight come from the approved construction.
Plan A
Four signal layers, three ground layers and one power plane. L3 sits between grounds on L2 and L4. L4 and L5 form a ground and power pair. L6 sits between the L5 power plane and the L7 ground.
Plan for: Nets on L6 that return through the L5 power plane rely on decoupling in your layout. Mark them in your net list.
Plan B
Four signal layers and four ground layers. Power runs as copper pours on signal layers. Each signal layer has a ground layer beside it, and L3 and L6 each sit between two grounds.
Plan for: Mark the power pours and their nets. A ground label shows the layer role, not whether copper is continuous under each route.
Layer roles are examples; dimensions and construction need approval. For design trade-offs, see our PCB stack-up design guide. Use the supplier stackup sign-off guide when checking a proposed construction.
Every field is optional. The tool formats a brief for CAM review. It does not calculate impedance, check the design or submit a request.
No choices yet. When you pick a layer plan, a short note about what it asks you to plan for appears here.
Specifications
These figures apply after CAM review of your files and construction. Combinations of features are confirmed per design.
| Item | Capability | What to send us |
|---|---|---|
| Layer count | 8 layers on this page; standard multilayer up to 24 layers, up to 32 layers reviewed per design | Layer count and role of each layer |
| Construction | Cores, prepreg and copper weights proposed by CAM for approval | Your stackup, or targets to work from |
| Finished thickness | Per approved construction | Target thickness and tolerance |
| Heavy copper inner layers | Up to 12 oz, subject to stack-up review | Copper weight on each layer |
| Item | Capability | What to send us |
|---|---|---|
| Trace and space, standard copper | 3/3 mil (75 µm) | Smallest trace and space by layer |
| Trace and space, 3 oz copper | 6/8 mil | Layers that carry 3 oz copper |
| Trace and space, 6 oz and heavier | 9/14 mil | Layers and copper weight |
| Controlled impedance | ±5% standard tolerance; TDR test report supplied with controlled-impedance orders | Net list with target, layers, reference planes, CAD width and gap |
| Drill spans | Lamination route confirmed per design from your drill files | One drill file per span, or through holes only |
| Hole position | ±0.025 mm | Drill table and fab drawing |
| Smallest mechanical drill | 0.10 mm (4 mil); production minimum confirmed at review | Finished hole sizes in the drill file |
| Layer registration | ±2 mil | Any tighter registration need on the drawing |
| Plated hole copper | ≥20 µm; ≥25 µm when Class 3 is specified; micro-section report available | Acceptance class |
| Laser microvia | 0.075 mm on HDI builds | Microvia spans in the drill table |
| Via treatment | Resin plugging; filled and capped VIPPO | Which vias need plugging or via in pad |
| Item | Capability | What to send us |
|---|---|---|
| Inspection | 100% electrical test (flying probe or fixture) and AOI on every board; X-ray available | Any added tests or records you require |
| Acceptance | IPC-6012 / IPC-A-600 Class 2 or Class 3, specified per order | Required class |
For other layer counts, see our 4-layer, 6-layer and 12-layer PCB manufacturer pages, or the multilayer PCB manufacturing overview.
Materials
On an 8-layer board, the laminate sets the dielectric values used to calculate every controlled trace. We confirm the material in the quote.
Name the laminate on your drawing or state its required properties. Tg is the glass transition temperature; Dk describes dielectric permittivity used in impedance modeling. Equal Tg values do not establish equal Dk. Standard FR-4 (Tg 130–180), high-Tg FR-4, and high-frequency Rogers and PTFE laminates are available.
State whether equivalents are acceptable. We review a proposed substitute against the required material properties and impedance geometry, and seek your approval before changing the construction.
Hard gold fingers with bevel, castellated edges and carbon ink are available. Show the locations on the fabrication drawing. Filled and plated-over via-in-pad (VIPPO) is also available; identify which pad vias require filling and capping. Immersion silver and immersion tin are also available.
Our factory
The photographs show drilling equipment, electrical test equipment and industrial ovens at our Shenzhen factory. Production is ISO 9001:2015 and UL certified and RoHS compliant.
Drilling equipment forms the holes listed in your drill files. Hole position capability is ±0.025 mm.
Every finished board is 100% electrically tested for opens and shorts, by flying probe or test fixture.
Two industrial ovens at our Shenzhen factory are shown in the photo above.
For controlled nets, ask us to confirm how impedance will be verified and recorded. For ENIG, XRF nickel and gold thickness readings for each lot can accompany the shipment.
Pricing
Compare eight-layer offers against the same construction, drill spans, impedance requirements and inspection scope. There is no strict MOQ; we build from prototype quantities to volume production.
Ask us to confirm the construction, tests, records and delivery date with your quote.
Lead time
Bare PCB quotes are typically sent within 2 hours of receiving complete Gerber files. Standard 6–8 layer lead time is 6 days under 1 m², 9 days for 1–5 m² and 12 days above 5 m²; expedited builds from 36 hours. Special materials and features are confirmed in the quote.
Email Gerbers, drill files and your net list. Email is the only required field.
CAM reads the net list, follows layer changes and sorts drill spans.
You receive the proposed construction, impedance geometry and any open questions about nets or drill spans. Ask us to confirm the fabrication and inspection scope with the quote.
You approve the construction and any substitution before production starts.
Boards are built and inspected to the agreed acceptance class, test scope and records.
Boards are vacuum-sealed with desiccant in ESD-safe bags and ship from China by DHL, FedEx or UPS, typically 3–5 days door to door.
Give your required arrival date and destination. Material availability, hole spans, via treatment, quantity and open review questions affect the schedule. Assembly can be quoted separately with a BOM.
FAQ
For each net class, list the impedance target, every layer the nets use, the reference planes on each layer, and the CAD trace width and gap.
No. Many 8-layer boards use through holes only. Your drill files show which spans the design uses, and CAM confirms the lamination route from them.
CAM sends a question or proposes a layer and geometry with the quote. Nothing goes into production until you approve the construction.
Our manufacturing review covers buildability and impedance geometry. Your design team checks stitching vias, plane splits, signal return paths and power integrity in the complete layout.
We measure controlled nets by TDR and supply the test report with the shipment. Our standard tolerance is ±5%.
Send it as drawn. CAM checks it against available materials. Any change, with its updated widths, is returned for your approval.
Every board gets 100% electrical testing and AOI. X-ray is available on request; name it in your inquiry.
Yes. Assembly is quoted separately from the bare board and needs a BOM along with the design files.
Ready to quote
Attach Gerbers, drill files and your controlled-net list, or describe the board first. Only email is required. Naming the layers and drill spans lets CAM start the construction with fewer questions.
Helpful details to include
Only email is required.
