6-layer bare PCB fabrication, Shenzhen
QueenEMS fabricates 6-layer bare boards in Shenzhen. Tell us what each layer carries, and our CAM engineers (manufacturing data preparation) review the build before quoting.
A request that gives only six layers and a thickness leaves the signal, ground and power roles open. CAM must ask before quoting, and a BGA (ball grid array) breakout may need more routing layers than planned.
Have files ready? Use the form. Still choosing layer roles? Compare the plans below.
Only email is required.
Bare PCB quotes are typically sent within 2 hours of receiving complete Gerber files.
Standard 6–8 layer lead time under 1 m²; expedited builds from 36 hours.
Standard impedance tolerance; TDR test report supplied with controlled-impedance orders.
Electrical test (flying probe or fixture) and AOI on every board.
Before you send files
Six copper layers rarely give six routing layers. With two ground layers and one power plane, three layers remain for signals. A dense BGA can need more escape layers, or smaller vias, than that plan provides.
Illustrative fab note: U1 BGA pitch and ball count per drawing; outer rows escape on L1, inner rows on L4 and L6; smallest via per drill table.
Check: Send the BGA pitch, ball count, escape layers, and the smallest via and trace used in the breakout.
When L3 and L4 both carry signals, parallel traces on the two layers can couple through the dielectric between them. Your designer needs to review the routing directions, overlap and dielectric spacing together.
Illustrative fab note: L3 routes mainly horizontal, L4 mainly vertical; quote to state the L3 to L4 dielectric thickness.
Check: Mark the main routing direction on each inner signal layer and ask CAM to state the dielectric between them.
A reference plane is nearby copper that carries a signal’s return current. A split under a route, or a change to another reference at a via, can interrupt that path. The plane artwork shows its copper shape; your designer must check it against the actual signal routes.
Illustrative fab note: high-speed nets do not cross L3 power splits; split map attached as PDF.
Check: Identify the power domains on the plane artwork and mark layer changes on critical nets. Send the layer map with the fabrication files.
Our process
CAM review checks whether your files can be built as described. Anything left open comes back to you as a question for approval before production. Routing and signal integrity remain decisions for your design team.
We match each Gerber copper file to the six stated layers and check the layer order against your drawing or note.
We note which layers carry signals, ground and power, including any power pours placed on signal layers.
We compare BGA pad, via and trace sizes with our capability and flag features that need via filling.
We review your specified construction. Where it is open, we propose cores, prepreg, copper weights and finished thickness for approval. A core is cured laminate; prepreg is the resin and glass bonding sheet used during lamination. Impedance geometry is reviewed against the proposed build.
Open items, such as an unstated dielectric between adjacent signal layers, come back as written questions alongside the quote scope.
Match your board
For a six-layer prototype or production order, include the details that match your board below.
Still deciding whether six layers are needed? Read the 4-layer vs 6-layer cost and EMI guide.
Layer roles
Both plans use six copper layers. Roles describe how each layer is used. Dielectric thickness and copper weight come from the approved construction.
Plan A
Three signal layers, two ground layers and one power plane. L1 references the L2 ground and L6 references the L5 ground. L4 sits between the L3 power plane and the L5 ground layer.
Plan for: Signals on L4 that return through the L3 power plane depend on decoupling and stitching in your layout.
Plan B
Four signal layers and two ground layers. Power runs as copper pours on signal layers. L3 references L2 and L4 references L5, while L3 and L4 face each other across one dielectric.
Plan for: Agree routing directions on L3 and L4, and ask CAM to state the dielectric between them.
Layer roles are examples; dimensions and construction need approval. For design trade-offs, see our PCB stack-up design guide. Use the supplier stackup sign-off guide when checking a proposed construction.
Every field is optional. The tool formats a brief for CAM review. It does not calculate impedance, check the design or submit a request.
No choices yet. When you pick a layer plan, a short note about what it asks you to plan for appears here.
Specifications
These figures apply after CAM review of your files and construction. Combinations of features are confirmed per design.
| Item | Capability | What to send us |
|---|---|---|
| Layer count | 6 layers on this page; standard multilayer up to 24 layers, up to 32 layers reviewed per design | Layer count and role of each layer |
| Construction | Cores, prepreg and copper weights proposed by CAM for approval | Your stackup, or targets for us to work from |
| Finished thickness | Per approved construction | Target thickness and tolerance |
| Heavy copper inner layers | Up to 12 oz, subject to stack-up review | Copper weight on each layer |
| Item | Capability | What to send us |
|---|---|---|
| Trace and space, standard copper | 3/3 mil (75 µm) | Smallest trace and space by layer |
| Trace and space, 3 oz copper | 6/8 mil | Layers that carry 3 oz copper |
| Trace and space, 6 oz and heavier | 9/14 mil | Layers and copper weight |
| Controlled impedance | ±5% standard tolerance; TDR test report supplied with controlled-impedance orders | Target, layer, reference plane, CAD width and gap |
| Hole position | ±0.025 mm | Drill table and fab drawing |
| Smallest mechanical drill | 0.10 mm (4 mil); production minimum confirmed at review | Finished hole sizes in the drill file |
| Layer registration | ±2 mil | Any tighter registration need on the drawing |
| Plated hole copper | ≥20 µm; ≥25 µm when Class 3 is specified; micro-section report available | Acceptance class |
| Via treatment | Resin plugging; filled and capped VIPPO | Which vias need plugging or via in pad |
| Item | Capability | What to send us |
|---|---|---|
| Surface finish | ENIG, ENEPIG, OSP, HASL, immersion silver, immersion tin; hard gold fingers with bevel, castellations, carbon ink | Finish and any edge or contact features |
| Inspection | 100% electrical test (flying probe or fixture) and AOI on every board; X-ray available | Any added tests or records you require |
| Acceptance | IPC-6012 / IPC-A-600 Class 2 or Class 3, specified per order | Required class |
For other layer counts, see our 4-layer, 8-layer and 12-layer PCB manufacturer pages, or the multilayer PCB manufacturing overview.
Materials
The laminate depends on your thermal, electrical and assembly requirements. We confirm the material in the quote.
Name the laminate on your drawing, or state the properties you need. Tg is the glass transition temperature; Dk describes dielectric permittivity used in impedance modeling. Equal Tg values do not establish equal Dk. We review impedance using the proposed laminate and construction. Standard FR-4 (Tg 130–180), high-Tg FR-4, and high-frequency Rogers and PTFE laminates are available.
If your drawing names a laminate, say whether equivalents are acceptable. Any substitution is proposed in writing and needs your approval before production.
Hard gold fingers with bevel, castellated edges and carbon ink are available. Show them on the fab drawing. Immersion silver and immersion tin are also available.
Our factory
The photographs show drilling equipment, electrical test equipment and industrial ovens at our Shenzhen factory. Production is ISO 9001:2015 and UL certified and RoHS compliant.
Drilling equipment forms through holes and vias. Hole position capability is ±0.025 mm.
Every finished board is 100% electrically tested for opens and shorts, by flying probe or test fixture.
Two industrial ovens at our Shenzhen factory are shown in the photo above.
Ask us to confirm which inspection and lot records will accompany your boards. Equipment photographs do not replace those records.
Pricing
To compare six-layer offers, ask each supplier to quote the same material, copper, hole treatment, finish and acceptance requirements. There is no strict MOQ; we build from prototype quantities to volume production.
Ask us to confirm the construction, tests, records and delivery date with your quote.
Lead time
Bare PCB quotes are typically sent within 2 hours of receiving complete Gerber files. Standard 6–8 layer lead time is 6 days under 1 m², 9 days for 1–5 m² and 12 days above 5 m²; expedited builds from 36 hours. Special materials and features are confirmed in the quote.
Email Gerbers, drill files and any drawing. Email is the only required field.
CAM checks the layer count, roles, geometry and special features against our capability.
Resolve the open requirements and ask us to confirm the construction, inspection scope and delivery date with the quote.
You approve the stackup and any material substitution before production starts.
Boards are built and inspected to the agreed acceptance class and test scope.
Boards are vacuum-sealed with desiccant in ESD-safe bags and ship from China by DHL, FedEx or UPS, typically 3–5 days door to door.
State the required arrival date and destination. Material availability, quantity, hole treatment and review rounds affect the schedule. PCB assembly can be quoted separately with a BOM.
FAQ
Gerber or ODB++ files, drill files, and a fab drawing or note listing thickness, finish and acceptance class. A short note on each layer's role helps CAM start review.
Yes. CAM proposes cores, prepreg and copper weights from your layer roles and targets, and you approve the construction before production. We do not route or redesign your board.
Our manufacturing review covers buildability and impedance geometry. Your design team checks routing, plane splits and signal integrity in the complete layout.
±5% is our standard tolerance. We set trace width and dielectric spacing at the CAM stage and supply a TDR test report with controlled-impedance shipments. Send the target, layer, reference plane, and CAD width and gap for each net class.
Every board gets 100% electrical testing and AOI. X-ray is available on request; name it in your inquiry.
For ENIG, XRF nickel and gold thickness readings can accompany each lot. Ask for them when you request the quote so they are listed in its scope.
Yes. IPC-6012 and IPC-A-600 Class 2 or Class 3 acceptance is set per order. State the class on your drawing; it is an order requirement, not a company certification.
Yes. Assembly is quoted separately from the bare board and needs a BOM along with the design files.
Ready to quote
Attach Gerbers and drill files, or describe the board first. Only email is required. A note on layer roles and BGA breakout lets CAM start review with fewer questions.
Helpful details to include
Only email is required.
