IPC-2226 HDI Types: Type I vs Type II vs Type III

The IPC-2226 HDI types sort boards by how many microvia layers sit on each side of the core and whether the core has buried vias. Type I has one microvia layer on one or both sides and no buried vias in the core (1+N+1). Type II has the same single microvia layer but adds buried vias in the core. Type III has two or more microvia layers on at least one side (2+N+2, 3+N+3 and up), with or without buried vias. Pick the type from the routing the BGA escape actually needs, then put the full stackup and via map on the drawing; the type alone does not tell a fabricator how to build the board.

What Is IPC-2226?

IPC-2226 is the IPC design standard for high-density interconnect (HDI) printed boards. It works as a sectional standard under IPC-2221, the generic design standard: IPC-2221 sets the general rules, and IPC-2226 adds what is specific to microvias, buildup layers and the HDI constructions. The current edition is IPC-2226A, published in September 2017 (IPC-2226A contents); IPC’s document revision table now lists it as no longer maintained, so check the revision your customer or contract names.

The standard defines a microvia as a blind structure with an aspect ratio of 1:1 or less and a depth of no more than 0.25 mm, a definition Altium reproduces in its via documentation. That definition is what separates an HDI buildup layer from a mechanically drilled blind via.

IPC-2226 is a design standard. Acceptance of the finished board, including microvia plating and microsection criteria, comes from the performance specification, IPC-6012, at the class you order. A Type III board is not automatically Class 3, and a Class 3 board can be Type I.

What Is an HDI Type I Board?

A core with one layer of microvias on one or both outer faces, and no buried vias inside the core. A typical 8-layer example is 1+6+1: microvias connect L1 to L2 and L8 to L7, a conventional 6-layer core sits in between, and plated through-holes carry the remaining connections.

Type I is the right starting point when the BGA can escape on the first inner layer: the outer row of balls routes on L1, the next rows drop through a microvia to L2, and everything else uses through-holes outside the array. It needs the fewest buildup steps. The through-holes still take routing space, so check their pads and antipads on inner layers before deciding Type I is enough.

What Is an HDI Type II Board?

A Type I construction plus buried vias in the core. In the same 8-layer example, a buried via from L2 to L7 lets inner signals change layers without a through-hole that would block channels on the outer layers.

Type II is useful when the escape works with one microvia layer but the inner routing needs layer changes that through-holes would make too congested. The buried vias are drilled and plated in the core before the outer buildup is laminated on, so the core is processed as its own subassembly. The difference from Type III is simple to check: if any net needs a second, stacked or offset microvia below the first one on the same side, the board is Type III, whatever the buried vias are called.

What Is an HDI Type III Board?

A board with two or more microvia layers on at least one side. 2+N+2 is the most common Type III build; 3+N+3 and beyond are used for very dense packages. Altium describes 2+N+2 as a Type III construction in its 2+N+2 stackup guide.

The second microvia layer is what lets a fine-pitch, fully populated BGA escape: inner rows of balls can reach L3 without a through-hole in the array. Each extra layer adds a sequential lamination, drilling and plating cycle, which is where the cost and lead time go.

The microvias on successive layers can be stacked directly on top of each other or staggered with an offset. Both are Type III. Changing stacked to staggered does not lower the type; only removing a buildup layer does. For the reliability side of that choice, see stacked versus staggered microvias.

Every-layer interconnect (ELIC, sometimes called any-layer HDI) takes this to its limit, with microvias between every pair of layers. It is a Type III style of build, but the label alone does not describe a construction; ask for the cross-section.

How Do You Choose Between Type I, II and III?

Route the BGA first, then classify the stackup that works. The package pitch and ball count set the problem, but which balls are actually used, where the power pins sit and how many channels the layout leaves open decide how many layers the escape needs. TI’s BGA layout guidance for its AM57xx processors shows how ball assignment and channel count drive routing-layer needs (TI SPRACA4).

A practical sequence:

1. Try the escape with one microvia layer per side and through-holes outside the array (Type I).
2. If inner routing is blocked by through-holes, add buried core vias (Type II).
3. If inner ball rows still cannot escape, add a second microvia layer (Type III).

If you are still deciding whether the board needs HDI at all, our guide on when a standard multilayer reaches its limit covers the signals to look for.

How Do the Types Differ in Lamination Cycles?

Each microvia buildup layer usually means one more lamination, drilling and plating sequence. A 1+N+1 board typically needs the core lamination plus one buildup cycle; a 2+N+2 board needs two buildup cycles; Type II adds the processing of the buried-via core as a subassembly. The exact count depends on how the fabricator builds the core and whether both sides are built up together, so ask for the proposed sequence. Altium’s article on sequential lamination and sub-lamination explains the two routes.

Cost follows the cycles. If a quote looks high, find the deepest connection that forces the extra buildup layer; moving a few microvias will not save anything if that connection remains.

Microvias in pads also need filling. Copper-filled microvias give a flat pad for stacking and soldering; for through-hole via-in-pad, resin fill with copper capping is common. Our guide to copper fill versus resin fill covers that choice.

What Should the HDI Drawing Specify?

For qualification, name the test rather than asking for “IPC testing”. IPC-TM-650 2.6.27 simulates convection reflow on test coupons and is commonly used to check microvia reliability (IPC-TM-650 2.6.27B). If the RFQ text says one type and the drawing shows another, settle it before ordering.

How Can We Help?

QueenEMS builds HDI PCBs with laser-drilled microvias down to 0.075 mm, in both stacked and staggered arrangements, and fills via-in-pad holes with resin plugging and copper capping to IPC-4761 Type VII. Send your stackup and via map with the BGA part numbers; we will confirm the construction we would build and how many lamination cycles it takes. Our bare-board quotes take 2 hours or less.

Conclusion

Choose the simplest type that completes the route, and put the stackup, via map and acceptance class on the drawing. For a wider view of HDI, see our HDI PCB guide. Contact us with the Gerber files, stackup, via map and quantities.

FAQ

What is IPC-2226? The IPC sectional design standard for HDI printed boards; it defines microvias and the Type I, II and III constructions.

What is the latest revision of IPC-2226? IPC-2226A, published in September 2017.

What is the difference between Type II and Type III HDI? Type II has one microvia layer per side plus buried core vias; Type III has two or more microvia layers on at least one side.

Is 2+N+2 Type III? Yes. Two microvia buildup layers on a side make it Type III.

Does a Type III board need IPC Class 3? No. The type describes construction; the class in IPC-6012 sets acceptance, and you choose it separately.