Stacked vs Staggered Microvias: Reliability, Cost and BGA Escape

Stacked microvias sit directly on top of each other, each one landing on the copper-filled via below; staggered microvias step sideways on each layer, so no via lands on another. Stacking saves space and is often the only way to escape the inner rows of a fine-pitch BGA. Staggering uses more area but avoids building one via-to-via interface on top of another, the structure IPC warned in 2019 can fail latently after passing normal lot acceptance. The usual practice: stagger where the routing allows, stack where it must, and qualify whichever construction you use with reflow-simulation testing, not only microsections. For the wider picture of buildup layers, see our HDI PCB guide.

What Is the Difference Between Stacked and Staggered Vias?

Where each successive microvia lands. A microvia connects only two adjacent layers. To go deeper, you either drill the next microvia directly over the first (stacked) or move sideways on the intermediate layer and drill the next one there (staggered). Both reach the same destination layer; they differ in footprint, in how they are built and in where stress concentrates.

For a stacked via, the lower microvia must be filled with copper and plated flat so the upper via has a solid target; via definitions in Altium’s documentation show stacked structures built this way. For a staggered via, each microvia lands on an ordinary copper pad, and the offset pads and link trace have to fit between neighboring nets.

When Do You Need Stacked Microvias?

When a trial escape shows the staggered route will not fit. That usually happens under the inner rows of a fine-pitch BGA, where there is no room to step sideways between balls, or under very dense parts where every layer is congested.

Pitch alone does not decide it. The used balls, power and ground assignments, pad sizes, trace and space rules and the number of routing layers all matter; TI’s BGA escape report shows how open channels change the escape. Route the most constrained signals first with your fabricator’s rules, and stack only where the staggered version collides. A board can mix both: stacked under the BGA center, staggered elsewhere. Note that the deepest stack still sets how many buildup cycles the whole board needs.

Why Are Staggered Microvias Considered More Reliable?

Because they avoid stacking interfaces. In March 2019, IPC issued an industry warning that microvia failures can appear after reflow, during environmental stress screening or in the field, on boards that had passed the usual lot acceptance, and that microsections viewed under a microscope often miss the weak interface between a microvia and its target pad (IPC warning). The coverage linked the problem especially to stacked structures on filled vias.

That is a reason to prefer staggering where routing allows, not a ban on stacking. A staggered via still has a via-to-pad interface that can fail if drilling, cleaning or plating is poor. What changes the risk is the evidence you ask for.

How Many Microvias Can You Stack?

There is no IPC-wide limit. Many fabricators state a maximum number of stacked levels for a given material and process, often lower than what the design software allows, and some customers set their own limit. Treat any number as that supplier’s qualified capability.

Count levels unambiguously on the drawing: an L1–L2 microvia over an L2–L3 microvia is two stacked levels. If a buried via continues below, show it separately. Adding a level, changing the dielectric or changing the fill makes earlier qualification data less representative.

How Do IPC-2226 HDI Types Relate to Stacking?

They describe different things. IPC-2226 types count microvia layers and buried vias; stacking or staggering describes alignment:

A 2-N-2 board is Type III whether its vias are stacked or staggered (AltiumLive HDI presentation). Write both on the RFQ, for example “Type III, staggered L1–L2 and L2–L3.” Our IPC-2226 types guide covers the construction choice.

What Aspect Ratio Rules Apply?

The same per via. Aspect ratio is depth divided by diameter, so a 75 µm deep microvia with a 100 µm opening is 0.75:1; stacking or staggering does not change it. The common microvia definition caps it at 1:1 (Altium). Lower ratios are easier to plate and, for stacked vias, easier to fill completely. State whether diameters are drilled or finished. For the fill itself, see copper fill vs resin fill; for via-in-pad treatment types, see our via tenting, plugging and filling guide.

How Do You Test Microvia Reliability?

With electrical measurements through simulated assembly, not just a cross-section. IPC-TM-650 2.6.27 (revision B) simulates convection reflow: at least six cycles unless agreed otherwise, with resistance of daisy-chain coupons monitored and, by default, a maximum 5% change from the first cycle’s peak-temperature reading (IPC-TM-650 2.6.27B). IPC-6012F added performance-based testing for microvia structures (section 3.10.15) and coupons for complex microvia constructions (IPC-6012F contents).

When a supplier sends a reliability report, check it covers your construction: material, via size, stacked or staggered, number of levels, coupon design, cycle conditions, sample count and failure criterion.

What Do They Cost?

Stacking usually costs more per buildup cycle because each lower via must be copper-filled and planarized before the next layer, and registration must be tighter. Whether the board costs more overall depends on whether staggering lets you remove a buildup cycle or a layer. The fair comparison is two quotes for the same board, material, thickness, quantity and test requirements, with the two via maps attached.

How Do You Choose for Your BGA?

1. Mark the used balls, power and ground, and the destination layer of each net.
2. Trial-route the tightest area staggered with your fabricator’s rules; see our guides to BGA fanout and HDI stackup options.
3. Stack only where the staggered route does not fit, and record those locations.
4. Put the HDI type, the allowed stacked levels and the required reliability testing on the fabrication drawing.

If you are changing via structure because of a field failure, confirm first that the failure was in the board interconnect and not the BGA solder joint.

How Can We Help?

QueenEMS builds HDI PCBs with both stacked and staggered microvias, and fills and copper-caps vias for via-in-pad designs (IPC-4761 Type VII). How many levels can be stacked depends on the material and construction, so we confirm it for your stackup rather than quote a general limit. Send the BGA ball map, stackup and via layer-pair drawing with the stacked and staggered locations marked; bare-board quotes are returned within 2 hours and state the via construction we will build. Our laser microvia and aspect ratio limits are listed in our PCB fabrication capabilities.

Conclusion

Stacked microvias save space and solve tight BGA escapes; staggered microvias need more room but avoid via-on-via interfaces. Stagger where the routing allows, stack where it must, put both the HDI type and the via arrangement on the drawing, and ask for reflow-simulation test data on the actual construction. Send us your files, including the ball map and the marked via drawing, to get a quote.

FAQ

What is the difference between stacked vias and staggered vias on a PCB? Stacked vias are aligned vertically, each on the filled via below; staggered vias are offset on each layer.

Are stacked microvias reliable? Yes, when built and qualified correctly, but they need copper fill and good interfaces, and IPC has warned that weak interfaces can pass normal acceptance and fail later.

Can stacked and staggered microvias be on the same board? Yes. Mixed designs are common; the deepest stack sets the number of buildup cycles.

What is a skip via? A laser via that passes through one layer without connecting to it, for example L1 to L3, instead of two stacked microvias.

What is a Type 7 via? A via filled and capped with copper under IPC-4761 Type VII, used for via-in-pad.