Copper-to-edge clearance is the minimum distance between any copper feature, on any layer, and the finished edge of the board. It exists because routing and scoring cut through the laminate: copper too close to the cut gets nicked, exposed or shorted to a metal chassis. There is no single IPC number that applies to every board. CAD tools start from a default (Altium’s board outline clearance rule defaults to 10 mil, about 0.25 mm, for every object-to-edge pair), and fabricators then ask for more next to V-score lines than next to routed edges. PCB copper-to-edge clearance requirements should therefore be set per edge type and per layer, and any copper that is meant to reach the edge, such as castellations or plated edges, should be marked as a deliberate feature.
| Edge or feature | What to check | Usual approach |
|---|---|---|
| Routed outline | Router tolerance, burrs | CAD default as a starting point, confirmed with the fabricator |
| V-score line | Blade cuts both faces at an angle | More clearance than a routed edge, all layers |
| Breakaway tabs, mouse bites | Breakout damage | Keep copper well clear of tab areas |
| Inner-layer planes | Exposed copper on the edge face | Pull planes back like outer copper |
| Edge plating, castellations | Intentional copper at the edge | Mark as a special feature on the drawing |
| High voltage or chassis contact | Creepage to metal enclosure | Set by the safety spacing, not the DFM default |
What Is Copper-to-Edge Clearance?
The keep-out between copper and the board outline, on outer and inner layers alike. In a DRC tool it is a rule between copper objects and the board outline, cutouts and slots. In fabrication it is the margin the CAM engineer needs so that the router or V-score blade never touches copper, allowing for registration and tool tolerance.
IPC-2221C, the generic design standard, deals with the topic across several clauses: dimensions and tolerances, edge plating as a separate feature, and electrical clearance (IPC-2221C contents, December 2023). IPC-6012F covers the condition of the finished board edge in acceptance (IPC-6012F contents, September 2023). Neither publishes one universal clearance value in its public preview, so the number on your drawing comes from the edge process and the fabricator’s capability.
Why Does Copper Near the Edge Cause Problems?
Because the cutting process is not perfectly accurate and it damages what it touches. Typical failures are:
- Exposed copper on the edge face, which corrodes or shorts to a metal chassis, card guide or shield;
- Delamination or cracking starting at copper that the router or score blade cut through;
- Burrs and slivers that bridge to nearby features;
- Reduced insulation on isolated or high-voltage boards, where the edge becomes the weakest path.
Analog Devices makes the last point in its isolation layout guidance: cutting or scoring can crack the board or expose inner-layer copper, and isolation gaps that end at the board edge or sharp plane corners create weak points; it recommends rounding plane corners and pulling planes back from the edge (ADI AN-0971, Rev C).
How Do Routing and V-Scoring Change the Clearance?
A routed edge needs room for router tolerance; a V-score needs more, because the blade removes a wedge of laminate from both faces and the remaining web is snapped. The score line has its own position tolerance, and the break leaves a rougher edge than routing. Copper planes on inner layers sit closer to the score’s cut faces than you might expect from the outer layers.
Breakaway tabs and mouse bites need the most care. When the tab is snapped, the board edge around it can chip or crack, so keep traces and planes clear of tab locations rather than routing them past at the normal edge clearance. For how the panel is broken up, see our article on panelization for assembly.
What Clearance Should You Use?
Start from your fabricator’s stated minimums for routed and scored edges, set your DRC rule to them, and add margin where the board allows it. If you have no fabricator values yet, the CAD default of about 10 mil (0.25 mm), as set in Altium’s board outline clearance rule, is a reasonable minimum for routed edges on simple boards, but not for V-scored edges, and not for planes that carry high voltage.
Practical rules that hold across fabricators:
- Apply the clearance to every copper layer, not only the outer ones; plane layers are the usual offenders.
- Use a larger keep-out along V-score lines and around tab locations.
- Pull pours and planes back with rounded corners rather than flooding to the outline.
- Keep components and their pads farther back than bare copper, so the router and the assembly fixture have room.
- For high-voltage designs, set the keep-out from the creepage and clearance requirement to the enclosure, which is usually far larger than the fabrication minimum.
The Gerber job file can carry the value you used: its MinClearanceToProfile attribute records the minimum clearance to the board profile in millimeters for each layer group (Gerber job format, 2020).
How Should Intentional Edge Copper Be Specified?
As a feature, with its own note, so the fabricator does not “fix” it. Castellated holes, edge plating for shielding, gold fingers and some RF ground edges deliberately bring copper to the outline. Mark them on the fabrication drawing, give their dimensions and plating, and say that edge-clearance rules do not apply to them. Our guides to castellated holes and PCB gold fingers cover their specific rules.
Everything else near the edge should be either moved or approved. When CAM finds copper inside the keep-out, the fabricator will usually propose pulling it back. That is harmless for a ground pour; it is not harmless for an RF ground edge, an antenna keep-out or a controlled-impedance trace, which is why those areas should be marked before the files go out.
What Should the Drawing and RFQ Say?
| Item | Example | Why |
|---|---|---|
| Edge process | “Routed outline; V-score between boards in panel” | Sets which clearance applies |
| Minimum clearance | Values for routed edge and V-score, all layers | Gives CAM a rule to check |
| Intentional edge copper | “Edge plating on L1/L8 per detail A” | Prevents silent removal |
| CAM changes | “Pullback of pours allowed; no change to marked areas” | Defines what CAM may do |
| Tabs | Tab and mouse-bite locations on the panel drawing | Keeps copper clear of breakout |
| Exposed copper | “No exposed copper on edges except where noted” | Acceptance criterion |
A free DFM check catches copper inside the edge keep-out before the order is placed, and our article on tooling holes covers the other features that live in the panel rails.
How Can We Help?
QueenEMS reviews every copper layer against the routed and scored outline during DFM and reports any copper inside the keep-out before production, with the proposed pullback for your approval rather than a silent change. Send the outline, copper layers and the panel method you want; boards up to 580 × 1050 mm and 0.2–6.0 mm thick are within our standard range, and we return bare-board pricing within 2 hours.
Conclusion
| Edge | Rule |
|---|---|
| Routed outline | Fabricator minimum, 10 mil CAD default as a floor |
| V-score | Larger keep-out on all layers |
| Tabs and mouse bites | Keep copper well clear |
| High voltage or metal enclosure | Creepage and clearance requirement |
| Castellations, edge plating, fingers | Mark as intentional features |
Set the rule for each edge type, apply it to every layer, and mark the copper that is meant to reach the edge. Contact us with the Gerber or ODB++ files, the outline and panel method, and the quantities.
FAQ
What is clearance in PCB design? The minimum distance between two conductive features, or between a feature and the board edge, set to prevent shorts, arcing and manufacturing damage.
What is the minimum copper-to-edge clearance? There is no universal value. Use your fabricator’s minimum for routed and scored edges; Altium’s DRC default is 10 mil (about 0.25 mm).
How close can components be to the edge of a PCB? Farther than bare copper: leave room for the router, the assembly conveyor and any fixture, and take the value from your assembler’s guidelines.
Does V-scoring need more edge clearance than routing? Yes. The blade cuts both faces and the break is less precise, so copper needs a larger keep-out along score lines.
Can copper go right to the board edge? Yes, when it is a deliberate feature such as edge plating or castellated holes, marked on the drawing.
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